Destructor integrated circuit chip, interposer electronic device and methods
US8268668B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2010 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Nov 25, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15192
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating an electronic circuit including forming a first depression on a first surface of a first wafer and forming a second depression on the first surface of the first wafer. The second depression is adjacent the first depression and separated from the first depression by a wall. The method further includes locating an actuator on the wall and attaching a first surface of a second wafer to the first surface of the first wafer to cover the first and second depressions. A first portion of the second wafer and the first depression define a first reservoir to contain a first chemical, and a second portion of the second wafer and the second depression define a second reservoir to contain a second chemical.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.