Method of manufacturing a transistor and method of manufacturing a semiconductor device
US8268694B2 · kind B2 · utility
1Cited by
1References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2009 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Jul 10, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method of manufacturing a transistor, a gate structure is formed on a substrate. First impurities are implanted into the substrate to form an impurity region at an upper portion of the substrate adjacent to the gate structure. An epitaxial layer is formed on the impurity region. An insulation layer having an opening partially exposing the epitaxial layer is formed on the substrate. Second impurities are implanted into a portion of the epitaxial layer exposed by the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.