Multichip package leadframe including electrical bussing
US8269334B1 · kind B1 · utility
0Cited by
4References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 17, 2011 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Feb 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide electrical bussing for multichip leadframes. In various embodiments, a leadframe may comprise a first die paddle for receiving a first microelectronic device, a second die paddle for receiving a second microelectronic device, and at least one electrical bus disposed between the first die paddle and the second die paddle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.