Patent · US Active

Memory system with extended memory density capability

US8271827B2 · kind B2 · utility

1Cited by

8References

22Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Christoph Bilger · Munich, DE
Peter Gregorius · Munich, DE
Michael Bruennert · Munich, DE
Maurizio Skerlj · Munich, DE
Wolfgang Walthes · Munich, DE
Johannes Stecker · Birkenfeld, DE
Hermann Ruckerbauer · Radolfzell, DE
Dirk Scheideler · Munich, DE
Roland Barth · Schreiber, CA

Key dates

Filing date	Dec 10, 2007
Grant date	Sep 18, 2012
Priority date	—
Expiry date	Feb 25, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/4243
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A system including a central processing unit, a first memory channel being configured to couple the central processing unit to a first semiconductor memory unit, wherein the first memory channel is configured to be clocked with a first clock frequency, and a second memory channel being configured to couple the central processing unit to a second semiconductor memory unit, wherein the second memory channel is configured or configurable to be clocked with a second clock frequency smaller than the first clock frequency.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.