Planar microshells for vacuum encapsulated devices and damascene method of manufacture
US8273594B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2011 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Jan 31, 2031 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/0771
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.