Method of fabricating n-channel metal-oxide semiconductor transistor
US8273631B2 · kind B2 · utility
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13References
11Claims
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Key dates
| Filing date | Dec 14, 2009 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Feb 10, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0275
Abstract
A method of fabricating an NMOS transistor, in which, an epitaxial silicon layer is formed before a salicide process is performed, then a nickel layer needed for the salicide process is formed, and, thereafter, a rapid thermal process is performed to allow the nickel layer to react with the epitaxial silicon layer and the silicon substrate under the epitaxial silicon layer to form a nickel silicide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.