Programmable delay module testing device and methods thereof
US8274272B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2009 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Mar 28, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31725
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A data processing device is configured so that, in a test mode of operation, the phase of an output signal of a second programmable delay module (PDM) is based on the phase of the input signal of the first PDM. To test the first and second PDMs, the output signal of the first PDM is set to each of a first set of phases and the corresponding phase of the output signal of the second PDM is compared to determine whether the performance of the first and second PDMs match a specification. Accordingly, the first and second PDMs are qualified based on their relative performance, reducing the need for test structures that consume an undesirably large amount of area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.