Method and apparatus for dynamic memory termination
US8274308B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2010 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Jul 3, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described herein are a method and an apparatus for dynamically switching between one or more finite termination impedance value settings to a memory input-output (I/O) interface of a memory in response to a termination signal level. The method comprises: setting a first termination impedance value setting for a termination unit of an input-output (I/O) interface of a memory; assigning the first termination impedance value setting to the termination unit when the memory is not being accessed; and switching from the first termination impedance value setting to a second termination impedance value setting in response to a termination signal level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.