Method of manufacturing semiconductor device
US8283235B2 · kind B2 · utility
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1References
8Claims
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Key dates
| Filing date | Jul 31, 2009 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Feb 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B53/40
Abstract
A method of manufacturing a semiconductor device including a plurality of capacitors each of which has bottom electrode, dielectric layer, and top electrode includes stacking a bottom electrode layer, a dielectric layer and an top electrode layer, patterning the top electrode layer to form a plurality of top electrodes arranged in a column, forming a mask pattern that covers the plurality of top electrodes and leaves an end part of the outermost top electrode of the arrangement of the plurality of top electrodes exposed, and patterning the dielectric layer using the mask pattern.
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