Wafer Level package for heat dissipation and method of manufacturing the same
US8283768B2 · kind B2 · utility
4Cited by
0References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2009 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Feb 6, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.