Method of and circuit for generating parameters for a predistortion circuit in an integrated circuit using a matrix
US8285770B1 · kind B1 · utility
10Cited by
14References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 29, 2008 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Aug 10, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2201/3233
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of generating parameters for a predistortion circuit in an integrated circuit using a matrix is disclosed. The method comprises storing a first column of a first matrix; generating the remaining columns of the first matrix based upon the first column of the matrix; generating a plurality of rows of a second matrix by performing a first set of calculations; and generating the remaining rows of the second matrix by selectively shifting the first rows of the second matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.