Patent · US Active

Performing memory accesses while omitting unnecessary address translations

US8285968B2 · kind B2 · utility

1Cited by
6References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 29, 2009
Grant dateOct 9, 2012
Priority date
Expiry dateAug 7, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/655
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In computing environments that use virtual addresses (or other indirectly usable addresses) to access memory, the virtual addresses are translated to absolute addresses (or other directly usable addresses) prior to accessing memory. To facilitate memory access, however, address translation is omitted in certain circumstances, including when the data to be accessed is within the same unit of memory as the instruction accessing the data. In this case, the absolute address of the data is derived from the absolute address of the instruction, thus avoiding address translation for the data. Further, in some circumstances, access checking for the data is also omitted.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.