Viktor Gyuris
20Patents
5h-index
25Co-inventors
65Inventor score
Filing activity: Feb 24, 2005 → Jul 25, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7290228B2 | Hardware accelerator with a single partition for latches and combinational logic | Physics | 18 | Expired |
| US9577985B2 | Provisioning work environments on personal mobile devices | Emerging Cross-Sectional Technologies | 13 | Active |
| US7769577B2 | Hardware accelerator with a single partition for latches and combinational logic | Physics | 10 | Active |
| US7783867B2 | Controlling instruction execution in a processing environment | Physics | 6 | Active |
| US7865346B2 | Instruction encoding in a hardware simulation accelerator | Physics | 6 | Active |
| US9219813B2 | Provisioning work environments on personal mobile devices | Emerging Cross-Sectional Technologies | 5 | Active |
| US8875114B2 | Employing identifiers provided by an operating system of a processing environment to optimize the processing environment | Physics | 4 | Active |
| US9247042B2 | Controlling use of a business environment on a mobile device | Emerging Cross-Sectional Technologies | 3 | Active |
| US7743234B2 | Facilitating communication within an emulated processing environment | Physics | 3 | Active |
| US8285968B2 | Performing memory accesses while omitting unnecessary address translations | Physics | 1 | Active |
| US7562320B2 | Asic based conveyor belt style programmable cross-point switch hardware accelerated simulation engine | Physics | 1 | Active |
| US10044734B2 | Provisioning work environments on personal mobile devices | Emerging Cross-Sectional Technologies | 1 | Active |
| US9985929B2 | Controlling use of a business environment on a mobile device | Emerging Cross-Sectional Technologies | 0 | Active |
| US7945433B2 | Hardware simulation accelerator design and method that exploits a parallel structure of user models to support a larger user model size | Physics | 0 | Active |
| US8725984B2 | Performing memory accesses while omitting unnecessary address translations | Physics | 0 | Active |
| US7685381B2 | Employing a data structure of readily accessible units of memory to facilitate memory access | Physics | 0 | Active |
| US10708656B2 | Provisioning work environments using virtual phone images | Emerging Cross-Sectional Technologies | 0 | Active |
| US9449169B2 | Block storage virtualization on commodity secure digital cards | Physics | 0 | Active |
| US7882336B2 | Employing a buffer to facilitate instruction execution | Physics | 0 | Active |
| US7899663B2 | Providing memory consistency in an emulated processing environment | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.