Apparatus and methods for semiconductor packages with improved warpage
US8288208B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2011 |
| Grant date | Oct 16, 2012 |
| Priority date | — |
| Expiry date | Jul 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1461
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for making a substrate for semiconductor packaging with improved warpage and an apparatus. A method includes providing on a die side of a substrate at least one flip chip mounted integrated circuit die. The substrate may include through substrate vias (TSVs). An underfill is dispensed between the integrated circuit die and the substrate. Initially the underfill is left uncured. A thermal interface material is provided on the upper surface of the at least one integrated circuit die. A heat sink is mounted over the integrated circuit die and in thermal contact with the thermal interface material. A thermal cure is performed to simultaneously cure the underfill material and the thermal interface material. In another embodiment, the thermal cure may simultaneously cure an adhesive mounting the heat sink to the substrate. Solder balls are disposed on a board surface of the substrate to form a ball grid array package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.