Method for producing a gate electrode structure

US8288230B2 · kind B2 · utility

Assignee

• Infineon Technologies Austria AG · AT

Inventors

• Hans Weber · Villach, AT
• Stefan Gamerith · Villach, AT
• Roman Knoefler · Villach, AT
• Kurt Sorschag · Villach, AT
• Anton Mauder · Kolbermoor, DE

Key dates

• Filing date: Sep 30, 2010
• Grant date: Oct 16, 2012
• Expiry date: Sep 30, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

A transistor with a gate electrode structure is produced by providing a semiconductor body with a first surface, and with a first sacrificial layer extending in a vertical direction of the semiconductor body from the first surface. A first trench extending from the first surface into the semiconductor body is formed by removing the sacrificial layer in a section adjacent the first surface. A second trench is formed by isotropically etching the semiconductor body in the first trench. A third trench is formed below the second trench by removing at least a part of the first sacrificial layer below the second trench. A dielectric layer is formed which at least covers sidewalls of the third trench and which only covers sidewalls of the second trench. A gate electrode is formed on the dielectric layer in the second trench. The gate electrode and dielectric layer in the second trench form the gate electrode structure.