Patent · US Active

Enhanced electromigration resistance in TSV structure and design

US8288270B2 · kind B2 · utility

2Cited by
10References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 15, 2012
Grant dateOct 16, 2012
Priority date
Expiry dateFeb 15, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The embodiments provide a method for reducing electromigration in a circuit containing a through-silicon via (TSV) and the resulting novel structure for the TSV. A TSV is formed through a semiconductor substrate. A first end of the TSV connects to a first metallization layer on a device side of the semiconductor substrate. A second end of the TSV connects to a second metallization layer on a grind side of the semiconductor substrate. A first flat edge is created on the first end of the TSV at the intersection of the first end of the TSV and the first metallization layer. A second flat edge is created on the second end of the TSV at the intersection of the second end of the TSV and the second metallization layer. On top of the first end a metal contact grid is placed, having less than eighty percent metal coverage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.