Shared memory having multiple access configurations
US8296526B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2009 |
| Grant date | Oct 23, 2012 |
| Priority date | — |
| Expiry date | May 12, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1652
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a first processor that accesses memory according to a first clock frequency, a second processor that accesses memory according to a second clock frequency, and a memory device is configurable to selectively operate according to the first clock frequency or the second clock frequency. A memory controller enables dynamic configuration of organization of the memory device to allow a first portion of the memory device to be accessed by the first processor according to the first clock frequency and a second portion of the memory device to be accessed by the second processor according to the second clock frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.