Charge blocking layers for nonvolatile memories

US8298890B1 · kind B1 · utility

Assignee

• INTERMOLECULAR, INC. · US

Inventors

• Ronald J. Kuse · Dublin, US
• Monica Mathur · San Jose, US
• Wen Wu · Pleasanton, US

Key dates

• Filing date: Sep 3, 2009
• Grant date: Oct 30, 2012
• Expiry date: Dec 20, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/697

Abstract

A semiconductor memory element is described, including a substrate including a source region, a drain region, and a channel region, a tunnel oxide over the channel region of the substrate, a charge storage layer over the tunnel oxide, a charge blocking layer over the charge storage layer, and a control gate over the charge blocking layer. The charge blocking layer further includes a first layer including a transition metal oxide, a second layer including a metal silicate, a third layer including the transition metal oxide of the first layer.