Enhanced thermal management of 3-D stacked die packaging
US8299608B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2010 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Dec 31, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/167
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A die stack package is provided and includes a substrate, a stack of computing components, at least one thermal plate, which is thermally communicative with the stack and a lid supported on the substrate to surround the stack and the at least one thermal plate to thereby define a first heat transfer path extending from one of the computing components to the lid via the at least one thermal plate and a fin coupled to a surface of the lid and the at least one thermal plate, and a second heat transfer path extending from the one of the computing components to the lid surface without passing through the at least one thermal plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.