Adaptive mode switching of flash memory address mapping based on host usage characteristics
US8301826B2 · kind B2 · utility
13Cited by
69References
12Claims
0Family size
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Key dates
| Filing date | Oct 30, 2009 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Oct 30, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a non-volatile memory storage system such as a flash EEPROM system, a controller switches the manner in which data sectors are mapped into blocks and metablocks of the memory in response to host programming and controller data consolidation patterns, in order to improve performance and reduce wear. Data are programmed into the memory with different degrees of parallelism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.