Implementation flow for electronic circuit designs using choice networks
US8302041B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2008 |
| Grant date | Oct 30, 2012 |
| Priority date | — |
| Expiry date | Aug 18, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/347
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method of implementing a circuit design that includes an initial network within a programmable logic device can include generating a first choice network from the circuit design according to a first synthesis technique and determining a placement for the first choice network. At least a second choice network can be generated from the first choice network according to a second synthesis technique. A placement for the second choice network can be determined. The placement for the first choice network can be compared with the placement for the second choice network. A placement and corresponding choice network can be selected according to the comparison, and output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.