Partial air gap formation for providing interconnect isolation in integrated circuits
US8304906B2 · kind B2 · utility
18Cited by
0References
20Claims
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Assignee
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Key dates
| Filing date | May 28, 2010 |
| Grant date | Nov 6, 2012 |
| Priority date | — |
| Expiry date | Oct 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Partial air gap formation for providing interconnect isolation in integrated circuits is described. One embodiment is an integrated circuit (“IC”) structure includes a substrate having two adjacent interconnect features formed thereon; caps formed over and aligned with each of the interconnect features; sidewalls formed on opposing sides of each of the interconnect features and a gap formed between the interconnect features; and a dielectric material layer disposed over the substrate to cover the caps and the gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.