Method for forming buried word line in semiconductor device
US8309448B2 · kind B2 · utility
8Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2009 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | Feb 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a method for forming a buried word line in a semiconductor device. The method includes forming a trench by etching a pad layer and a substrate, forming a conductive layer to fill the trench, planarizing the conductive layer until the pad layer is exposed, performing an etch-back process on the planarized conductive layer, and performing an annealing process in an atmosphere of a nitride-based gas after at least one of the forming of the conductive layer, the planarizing of the conductive layer, and the performing of the etch-back process on the planarized conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.