Semiconductor devices having narrow conductive line patterns and related methods of forming such semiconductor devices
US8310055B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2009 |
| Grant date | Nov 13, 2012 |
| Priority date | — |
| Expiry date | Jul 22, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices and methods of forming semiconductor devices are provided in which a plurality of patterns are simultaneously formed to have different widths and the pattern densities of some regions are increased using double patterning. The semiconductor device includes a plurality of conductive lines each including a first line portion and a second line portion, where the first line portion extends on a substrate in a first direction, the second line portion extends from one end of the first line portion in a second direction, and the first direction is different from the second direction; a plurality of contact pads each of which is connected with a respective conductive line of the plurality of conductive lines via the second line portion of the corresponding conductive line; and a plurality of dummy conductive lines each including a first dummy portion extending from a respective contact pad of the plurality of contact pads, in parallel with the corresponding second line portion in the second direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.