On-chip heat spreader
US8314483B2 · kind B2 · utility
25Cited by
34References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2009 |
| Grant date | Nov 20, 2012 |
| Priority date | — |
| Expiry date | Dec 4, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three dimensional (3D) stacked chip structure with chips having on-chip heat spreader and method of forming are described. A 3D stacked chip structure comprises a first die having a first substrate with a dielectric layer formed on a front surface. One or more bonding pads and a heat spreader may be simultaneously formed in the dielectric layer. The first die is bonded with corresponding bond pads on a surface of a second die to form a stacked chip structure. Heat generated in the stacked chip structure may be diffused to the edges of the stacked chip structure through the heat spreader.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.