Method and apparatus to implement a reset function in a non-volatile static random access memory
US8315096B2 · kind B2 · utility
7Cited by
56References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 24, 2011 |
| Grant date | Nov 20, 2012 |
| Priority date | — |
| Expiry date | Aug 24, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/0063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The state of a volatile memory cell is set by grounding a power supply to the volatile memory cell and driving a first bit line to the volatile memory cell to a first defined state. The first defined state of the first bit line is controllable independently of a defined state of a second bit line to the volatile memory cell. A word line of the volatile memory cell is driven to a word line state, and the power supply to the volatile memory cell is ungrounded.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.