Bang-bang phase detector with sub-rate clock
US8315349B2 · kind B2 · utility
65Cited by
16References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 26, 2008 |
| Grant date | Nov 20, 2012 |
| Priority date | — |
| Expiry date | Aug 21, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D13/004
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention describes methods and circuitry for a sub-rate bang-bang phase detector, in which the reference clock has frequency that is a fraction of the bit rate of the received data stream. The sub-rate bang-bang phase detector is enabled by multiple phases of the reference clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.