Patent assignee · CA · COMPANY

DIABLO TECHNOLOGIES INC.

19Patents
18Active
19Granted
53Portfolio score

Filing activity: Aug 27, 2004 → Apr 20, 2015 · 6 expiring within 5 years

Most-cited patents

PatentTitleAreaCited byStatus
US8713379B2 System and method of interfacing co-processors and input/output devices via a main memory system Physics 79 Active
US7940839B2 Fully adaptive equalization for high loss communications channels Electricity 77 Expired
US8738853B2 Load reduction dual in-line memory module (LRDIMM) and method for programming the same Physics 67 Active
US7796652B2 Programmable asynchronous first-in-first-out (FIFO) structure with merging capability Electricity 66 Active
US7902886B2 Multiple reference phase locked loop Electricity 65 Active
US8315349B2 Bang-bang phase detector with sub-rate clock Electricity 65 Active
US8218705B2 Linear phase interpolator and phase detector Electricity 65 Active
US7777581B2 Voltage Controlled Oscillator (VCO) with a wide tuning range and substantially constant voltage swing over the tuning range Electricity 64 Active
US8081677B2 Receiver-based adaptive equalizer with pre-cursor compensation Electricity 64 Active
US8452917B2 Load reduction dual in-line memory module (LRDIMM) and method for programming the same Physics 63 Active
US7889786B2 Operating frequency reduction for transversal FIR filter Electricity 62 Active
US9552175B2 System and method for providing a command buffer in a memory system Electricity 11 Active
US9015408B2 Load reduction dual in-line memory module (LRDIMM) and method for programming the same Physics 6 Active
US9444495B2 System and method of interfacing co-processors and input/output devices via a main memory system Physics 4 Active
US9449651B2 System and method for offsetting the data buffer latency of a device implementing a JEDEC standard DDR-4 LRDIMM chipset Physics 3 Active
US9575908B2 System and method for unlocking additional functions of a module Physics 1 Active
US8972805B2 System and method of interfacing co-processors and input/output devices via a main memory system Physics 1 Active
US9465557B2 Load reduction dual in-line memory module (LRDIMM) and method for programming the same Physics 0 Active
US9779020B2 System and method for providing an address cache for memory map learning Electricity 0 Active

Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.