Patent · US Active

Method and mechanism for implementing extraction for an integrated circuit design

US8316331B1 · kind B1 · utility

0Cited by

35References

24Claims

0Family size

Assignee

Cadence Design Systems, Inc. · US

Inventors

Eric Nequist · Monte Sereno, US
Richard Brashears · San Jose, US
Matthew A. Liberty · Lake Oswego, US
Michael McSherry · Portland, US

Key dates

Filing date	Jan 7, 2011
Grant date	Nov 20, 2012
Priority date	—
Expiry date	Jan 24, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/398
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An improved method and system for stitching one or more islands of an integrated circuit design is disclosed. Multiple connected island objects in the IC design are first identified. At least one of the multiple identified connected island objects is then modified to form a modified island object. The modified island object may then be stitched into the multiple identified connected island objects. In some embodiments, stitching a modified island object may be implemented by tracking the endpoint(s), port(s), or node(s) of the connected island object being modified and stitched.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.