Low creep metallization for optoelectronic applications
US8319236B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2008 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | May 25, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/22
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A metallization on a semiconductor substrate is disclosed in the form of a laminate comprising a plurality of layers of a “conducting” metallization for providing electrical conductivity, interspersed with a plurality of layers of another metallization. By providing many layers the thickness of each individual layer can be reduced. Reduction in thickness of each layer leads to a reduction in grain size and a consequent reduction in creep over the lifetime of a device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.