Semiconductor device, method of manufacturing same, and apparatus for designing same
US8319277B2 · kind B2 · utility
16Cited by
13References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2010 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Dec 30, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device that includes multiple logic circuit cells having respective logic circuits formed therein and multiple interconnects connected to the corresponding logic circuit cells. At least one of the interconnects has an opening formed therein so as to have an opening ratio different from one or more of the opening ratios of the remaining interconnects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.