Patent · US Active

Memory cell arrangement, method for controlling a memory cell, memory array and electronic device

US8320191B2 · kind B2 · utility

4Cited by

457References

25Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Robert Strenz · Radebeul, DE
Wolfram Langheinrich · Dresden, DE
Mayk Roehrich · Dresden, DE
Robert Wiesner · Chandler, US

Key dates

Filing date	Mar 14, 2008
Grant date	Nov 27, 2012
Priority date	—
Expiry date	Apr 13, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH10D30/681
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In an embodiment of the invention, a memory cell arrangement includes a substrate and at least one memory cell including a charge storing memory cell structure and a select structure. The memory cell arrangement further includes a first doping well, a second doping well and a third doping well arranged within the substrate, wherein the charge storing memory cell structure is arranged in or above the first doping well, the first doping well is arranged within the second doping well, and the second doping well is arranged within the third doping well. The memory cell arrangement further includes a control circuit coupled with the memory cell and configured to control the memory cell such that the charge storing memory cell structure is programmed or erased by charging or discharging the charge storing memory cell structure via at least the first doping well.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.