Data output circuit for semiconductor memory device
US8320199B2 · kind B2 · utility
6Cited by
4References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 3, 2010 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Sep 19, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1057
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data output circuit for a semiconductor memory device includes a first driver configured to output a first drive control signal in response to a data signal, a drive controller configured to compare a voltage level of the first drive control signal with a reference voltage and output a second drive control signal, and a second driver configured to drive an output terminal in response to the first drive control signal and additionally drive the output terminal in response to the second drive control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.