Offset error automatic calibration integrated circuit
US8321170B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2010 |
| Grant date | Nov 27, 2012 |
| Priority date | — |
| Expiry date | Apr 28, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01D18/008
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit includes a transducer and transducer circuitry and additional elements useful in testing the transducer and transducer circuitry. A first power supply terminal and a second power supply terminal are for being directly connected to an external power supply terminal. A power bus is connected to the first power supply terminal. A logic function is for determining if the second power supply terminal is receiving power and if an automatic calibration test of the transducer and transducer circuitry has been run. An automatic calibration is for running an automatic calibration test on the transducer and transducer circuitry if the logic means determines that the second power supply terminal is receiving power and the automatic calibration test of the transducer and transducer circuitry has not been run.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.