Patent · US Active

Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication

US8324660B2 · kind B2 · utility

68Cited by

256References

24Claims

0Family size

Assignee

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

Anthony J. Lochtefeld · Ipswich, US
Matthew T. Currie · Brookline, US
Zhiyuan Cheng · Cambridge, US
James Fiorenza · Wilmington, US
Glyn Braithwaite · Hooksett, US
Thomas A. Langdo · Framingham, US

Key dates

Filing date	Jul 28, 2010
Grant date	Dec 4, 2012
Priority date	—
Expiry date	Jul 28, 2030

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02E10/547
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.