Thomas A. Langdo
45Patents
13h-index
26Co-inventors
77Inventor score
Filing activity: Jun 7, 2002 → Feb 5, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6995430B2 | Strained-semiconductor-on-insulator device structures | Electricity | 392 | Expired |
| US7074623B2 | Methods of forming strained-semiconductor-on-insulator finFET device structures | Electricity | 173 | Expired |
| US7109516B2 | Strained-semiconductor-on-insulator finFET device structures | Electricity | 85 | Expired |
| US7420201B2 | Strained-semiconductor-on-insulator device structures with elevated source/drain regions | Electricity | 77 | Expired |
| US7638842B2 | Lattice-mismatched semiconductor structures on insulators | Electricity | 73 | Expired |
| US8324660B2 | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication | Emerging Cross-Sectional Technologies | 68 | Active |
| US7122449B2 | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements | Electricity | 45 | Expired |
| US6946371B2 | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements | Electricity | 42 | Expired |
| US8629477B2 | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication | Emerging Cross-Sectional Technologies | 34 | Active |
| US8796734B2 | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication | Emerging Cross-Sectional Technologies | 18 | Active |
| US8519436B2 | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication | Emerging Cross-Sectional Technologies | 14 | Active |
| US8273603B2 | Interposers, electronic modules, and methods for forming the same | Emerging Cross-Sectional Technologies | 14 | Active |
| US7588994B2 | Methods for forming strained-semiconductor-on-insulator device structures by mechanically inducing strain | Electricity | 13 | Active |
| US7259388B2 | Strained-semiconductor-on-insulator device structures | Electricity | 12 | Expired |
| US7838392B2 | Methods for forming III-V semiconductor device structures | Electricity | 12 | Active |
| US7297612B2 | Methods for forming strained-semiconductor-on-insulator device structures by use of cleave planes | Electricity | 12 | Expired |
| US8017451B2 | Electronic modules and methods for forming the same | Electricity | 11 | Active |
| US8748292B2 | Methods of forming strained-semiconductor-on-insulator device structures | Electricity | 10 | Active |
| US8026534B2 | III-V semiconductor device structures | Electricity | 9 | Active |
| US7041170B2 | Method of producing high quality relaxed silicon germanium layers | Electricity | 9 | Expired |
| US8535984B2 | Electronic modules and methods for forming the same | Electricity | 9 | Active |
| US7615829B2 | Elevated source and drain elements for strained-channel heterojuntion field-effect transistors | Electricity | 7 | Expired |
| US7439164B2 | Methods of fabricating semiconductor structures having epitaxially grown source and drain elements | Electricity | 7 | Active |
| US9064930B2 | Methods for forming semiconductor device structures | Electricity | 5 | Active |
| US9431243B2 | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication | Emerging Cross-Sectional Technologies | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.