Dummy structure for isolating devices in integrated circuits
US8324668B2 · kind B2 · utility
29Cited by
1References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2009 |
| Grant date | Dec 4, 2012 |
| Priority date | — |
| Expiry date | Aug 8, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides an integrated circuit. The integrated circuit includes a first operational device having a first transistor of a first composition; a second operational device having a second transistor of the first composition; and an isolation transistor disposed between the first and second transistors, the isolation transistor having a second composition different from the first composition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.