Fragment shader bypass in a graphics processing unit, and apparatus and method thereof
US8325184B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2007 |
| Grant date | Dec 4, 2012 |
| Priority date | — |
| Expiry date | Jan 13, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Configuration information is used to make a determination to bypass fragment shading by a shader unit of a graphics processing unit, the shader unit capable of performing both vertex shading and fragment shader. Based on the determination, the shader unit performs vertex shading and bypasses fragment shading. A processing element other than the shader unit, such as a pixel blender, can be used to perform some fragment shading. Power is managed to “turn off” power to unused components in a case that fragment shading is bypassed. For example, power can be turned off to a number of arithmetic logic units, the shader unit using the reduced number of arithmetic logic unit to perform vertex shading. At least one register bank of the shader unit can be used as a FIFO buffer storing pixel attribute data for use, with texture data, to fragment shading operations by another processing element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.