High-speed transceiver tester incorporating jitter injection
US8327204B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2006 |
| Grant date | Dec 4, 2012 |
| Priority date | — |
| Expiry date | Jun 16, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B17/20
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A tester for testing high-speed serial transceiver circuitry. The tester includes a jitter generator that uses a rapidly varying phase-selecting signal to select between two or more differently phased clock signals to generate a phase-modulated signal. The phase-selecting signal is designed to contain low- and high-frequency components. The phase-modulated signal is input into a phase filter to filter unwanted high-frequency components. The filtered output of the phase filter is input into a data-transmit serializer to serialize a low-speed parallel word into a high-speed jittered test pattern for input into the transceiver circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.