Test pattern for detecting piping in a memory array
US8329480B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2010 |
| Grant date | Dec 11, 2012 |
| Priority date | — |
| Expiry date | Jun 29, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of detecting manufacturing defects at a memory array may include disposing an active area of a first width in communication with a first conductive member of the memory array to define a grounded conductive member, disposing an isolation structure of a second width in communication with a second conductive member of the memory array to define a floating conductive member, and providing an alternating arrangement of floating and grounded conductive members including arranging a plurality of the grounded and floating conductive members adjacent to each other to define a sequence of alternating floating and grounded conductive members. A corresponding test device is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.