Method of manufacturing a high-performance semiconductor device
US8329566B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2010 |
| Grant date | Dec 11, 2012 |
| Priority date | — |
| Expiry date | Jun 22, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/2652
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method of manufacturing a semiconductor device, wherein the method comprises: providing a substrate; forming a source region, a drain region, a dummy gate structure, and a gate dielectric layer on the substrate, wherein the dummy gate structure is between the source region and the drain region on the substrate, and the gate dielectric layer is between the substrate and the dummy gate structure; annealing the source region and the drain region; removing the dummy gate structure to form an opening; implanting dopants into the substrate from the opening to form a steep retrograded well; annealing to activate the dopants; and forming a metal gate on the gate dielectric layer by deposition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.