Method and system to improve the performance of a multi-level cell (MLC) NAND flash memory
US8332578B2 · kind B2 · utility
53Cited by
1References
28Claims
0Family size
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Key dates
| Filing date | Jul 31, 2009 |
| Grant date | Dec 11, 2012 |
| Priority date | — |
| Expiry date | May 10, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7207
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system to improve the performance of a multi-level cell (MLC) NAND flash memory. In one embodiment of the invention, the metadata associated with the data stored in a MLC NAND flash memory is stored only in one or more lower pages of the MLC NAND flash memory. The MLC NAND flash memory has lower and upper pages, where the lower pages have a faster programming time or rate than the upper pages in one embodiment of the invention. By storing the metadata only in the pages of the MLC NAND flash memory that have low latencies of programming, the quality of service (QoS) of the MLC NAND flash memory can be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.