Substrate for integrated circuit package with selective exposure of bonding compound and method of making thereof
US8338924B2 · kind B2 · utility
1Cited by
3References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2011 |
| Grant date | Dec 25, 2012 |
| Priority date | — |
| Expiry date | Oct 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate for integrated circuit package is disclosed. The substrate comprises an electrically conductive leadframe having a first side and an opposing second side. The substrate has a first bonding compound disposed in a first recessed portion of the first side and a second bonding compound disposed in at least a portion of a second recessed portion of the leadframe, selectively exposing a selected area of the leadframe on the second side. In an exemplary embodiment, the second bonding compound is a photolithographic material. A method of manufacturing a substrate for integrated circuit package is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.