Self-mixing receiver and forming method thereof
US8340623B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2007 |
| Grant date | Dec 25, 2012 |
| Priority date | — |
| Expiry date | Oct 18, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/06
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
This invention is primarily a circuit structure of self-mixing receiver, and the methodology of circuit structure is described as follows. The first stage is a high input impedance voltage amplifier utilized to amplify the received RF carrier signal from the antenna. Besides, there are no any inductors required. The second stage is a multi-stage amplifier to amplify the output signal of first stage to rail-to-rail level, which is quite the same with supply voltage. The third stage is a mixer adopted to lower the signal frequency. The fourth stage is a digital output converter, which is proposed to demodulate the electric signals and convert the demodulated signal to digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.