Integrated circuits using guard rings for ESD, systems, and methods for forming the integrated circuits

US8344416B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Ming-Song Sheu · Hsinchu, TW
• Jian-Hsing Lee · Xinwen, TW
• Yu-Chang Jong · Baoshan, TW
• Chun-Chien Tsai · Yongkang, TW

Key dates

• Filing date: May 11, 2010
• Grant date: Jan 1, 2013
• Expiry date: Mar 26, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/307

Abstract

An integrated circuit includes at least one transistor over a substrate. A first guard ring is disposed around the at least one transistor. The first guard ring has a first type dopant. A second guard ring is disposed around the first guard ring. The second guard ring has a second type dopant. A first doped region is disposed adjacent to the first guard ring. The first doped region has the second type dopant. A second doped region is disposed adjacent to the second guard ring. The second doped region has the first type dopant. The first guard ring, the second guard ring, the first doped region, and the second doped region are capable of being operable as a first silicon controlled rectifier (SCR) to substantially release an electrostatic discharge (ESD).