System and method for addressing threshold voltage shifts of memory cells in an electronic product
US8345483B2 · kind B2 · utility
1Cited by
16References
20Claims
0Family size
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Key dates
| Filing date | Jan 21, 2011 |
| Grant date | Jan 1, 2013 |
| Priority date | — |
| Expiry date | Jun 30, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for addressing threshold voltage shifts of memory cells. A method includes reading a pattern of data from a first plurality of memory cells, comparing the read of the pattern of data with a known pattern of data using a reference, and if the read of the pattern of data and the known pattern of data do not match, adjusting the reference to find a reference level that results in a matching of a read of the pattern of data and the known pattern of data. Thereafter, trim sector data is read into a second plurality of memory cells using the adjusted reference level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.