Anti-fuse based programmable serial number generator
US8350356B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 27, 2010 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Dec 27, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
Abstract
An anti-fuse apparatus includes a substrate of a first conductivity type and a well region of a second conductivity type formed in the substrate. A junction between the well region and the substrate is characterized by a breakdown voltage higher than a predetermined voltage. The apparatus includes a contact region of the second conductivity type within the well region. The apparatus also includes a channel region and a drain region within the substrate. A gate dielectric layer overlies the channel region and the contact region. A first polysilicon gate, the drain region, and the well region are associated with an MOS transistor. The apparatus also includes a second polysilicon gate overlying the gate dielectric layer which overlies the contact region. The contact region is configured to receive a first supply voltage and the second polysilicon gate is configured to receive a second supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.