Adapting read reference voltage in flash memory device
US8351258B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2011 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Jul 14, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One example apparatus includes an adaptation logic configured to determine a reference voltage adaptation for a flash memory device as a function of a current reference voltage in use by the flash memory device and a difference of bit error types experienced by the flash memory device. In one embodiment, the difference of bit error types compares a number of zero to one bit errors to a number of one to zero bit errors. In one embodiment, the adaptation logic is further configured to determine a reference voltage adaptation that will shift the reference voltage towards a threshold voltage (Vth) distribution associated with a zero value by an amount that is proportional to the difference of bit errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.