Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die
US8354297B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2010 |
| Grant date | Jan 15, 2013 |
| Priority date | — |
| Expiry date | Jan 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a first semiconductor die mounted over a carrier. Wettable contact pads can be formed over the carrier. A second semiconductor die is mounted over the first semiconductor die. The second die is laterally offset with respect to the first die. An electrical interconnect is formed between an overlapping portion of the first die and second die. A plurality of first conductive pillars is disposed over the first die. A plurality of second conductive pillars is disposed over the second die. An encapsulant is deposited over the first and second die and first and second conductive pillars. A first interconnect structure is formed over the encapsulant, first conductive pillars, and second die. The carrier is removed. A second interconnect structure is formed over the encapsulant, second conductive pillars, and first die. A third conductive pillar is formed between the first and second build-up interconnect structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.