Gate-all-around CMOSFET devices
US8354721B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2010 |
| Grant date | Jan 15, 2013 |
| Priority date | — |
| Expiry date | Jun 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A GAA (Gate-All-Around) CMOSFET device includes a semiconductor substrate, a PMOS region having a first channel, an NMOS region having a second channel and a gate region. The surfaces of the first channel and the second channel are substantially surrounded by the gate region. A buried insulation layer is disposed between the PMOS region and the NMOS region and between the PMOS or NMOS region and the semiconductor substrate to isolate them from one another. The structure is simple, compact and highly integrated, has high carrier mobility, and avoids polysilicon gate depletion and short channel effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.